Field of the Invention
The present invention relates to a printed circuit board, hereinafter "PCB" and a method for wiring signal lines on the same.
A plurality of semiconductor chips are mounted on a PCB and the PCB is mounted on a motherboard, thereby electrically connecting its pad to the motherboard.
When a chip select signal or an address signal is transmitted from the motherboard to the PCB, a corresponding semiconductor chip is selected or its address is designated. Accordingly, signal lines for transmitting a chip select signal and an address signal to each semiconductor chip are wired on the PCB. The signal lines vary as to what semiconductor chip is mounted on the PCB.
Namely, the signal lines vary as memory capacity of the semiconductor chip is 64M including 128M or 256M, and also vary as the type of semiconductor chip, e.g. an unstack type consisting of one chip by itself, or stack type consisting of a plurality of stacked chips.
First of all, four pads provided on the PCB are used as chip select signals, and each corresponding pad is connected to a chip select pin, typically a nineteenth pin (/cs). The four pads are named typically S0, S1, S2, and S3. Only two pads are used 4 chip selection in case that the semiconductor chip mounted on the PCB is the unstack type, and four pads are all used as chip selection in case that it is the stack type. The following Table 1 illustrates the fashion in particular.
TABLE 1 Pad No. S0 S1 S2 S3 unstack chip use nonuse use nonuse stack chip use use use use
As shown in Table 1, only pads S0 and S2 are used in the unstack type of the semiconductor chip, while four pads are all used in the stack type of that. Accordingly, in case of unstack type, the used pads S0 and S2 are connected to the nineteenth pin of the semiconductor chip via signal lines, and pads S1 and S3 are not connected to the nineteenth pin. On the other hand, in case of stack type, the four pads are all connected to the nineteenth pin of the semiconductor chip via signal lines. Thus, the wiring arrangement of signal lines varies as the semiconductor chip mounted on the PCB is the unstack type or the stack type.
In the meantime, the address signal is generally transmitted to a twentieth pin, a twenty-first pin and a thirty-sixth pin via pads on the PCB. The pins used for the address signal vary as the memory capacity of semiconductor chip is 64M or 128M on the one hand or 256 the other hand. The following Table 2 illustrates the fashion in particular.
TABLE 2 Pin No. 64M including 128M 256M 20 A13 A14 21 A12 A13 36 NC A12
As shown in Table 2, in case that the memory capacitance of the semiconductor chip is 64M, the address signal is transmitted to the twentieth pin via the pad A13, to the twenty-first pin via the pad A12, while the thirty-sixth pin is not connected to any pad. The word NC means "No Connect". In the meantime, in case of 256M, the address signal is transmitted to the twentieth pin via the pad A14, to the twenty-first pin via the pad A13 and to the thirty-sixth pin via the pad A12. Accordingly, the wiring arrangement of signal lines varies as the memory capacity of chip is 64M or 256M.
As described above, the wiring arrangements of signal lines on the PCB vary with the semiconductor chips to be mounted. That is, there are totally four cases of different wiring arrangement of signal lines that the semiconductor chip is unstack/64M or 128M, unstack/256M, stack/64M 128M, and stack/256M.
Therefore, it is conventionally required to have four PCBs having different wiring arrangements according to the four cases. Particularly, the PCB is made pursuant to each wiring arrangement, therefore it incurs lots of time-consuming jobs for developing appropriate module, testing the PCB or mass-producing and delivering products to production line.